PIC32MZ Core Architecture
Intended for an engineer who is new to the PIC32MZ Microcontroller. This self-paced, online class provides a complete introduction to the hardware architecture for this MCU family.
2
MCU Introduction
CPU Overview
Instruction Pipeline
System Bus
3
Overview
CPU Registers
Shadow Registers
Addressing Modes
Instruction Categories
Data Types
Endianness
Coprocessors
4
Overview
Modes of Operation
Virtual Address Space
Virtual vs. Physical Memory
Address Translation
Memory Map Example
Alignment
Level 1 Cache
Prefetch Module
5
What is Cache Memory ?
How Does Cache Work ?
Cache Coherency Defined
Managing Cache Coherency
Cache Policy Comparison Chart
Changing The Cache Policy
Cache Management Assembly Instructions
Completely Disable the Cache
Disable Cache for Shared Data
Maintaining Cache Coherency (SUMMARY)
6
PIC32MZ Exception Overview
Exception Types
Entry Points
Control Registers
Operation
Interrupt & Exception Usage
Processor Initialization
7
Objective
Hardware Tools
Software Tools & Exercise Files
Procedure
Results
Conclusions
8
Objective
Hardware Tools
Software Tools & Exercise Files
Procedure
Results
Conclusions
How did we do?
How did we do?